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dc.title Blocked All-Pairs Shortest Paths Algorithm on Intel Xeon Phi KNL Processor: A Case Study en
dc.type Documento de conferencia es
dcterms.abstract Manycores are consolidating in HPC community as a way of improving performance while keeping power efficiency. Knights Landing is the recently released second generation of Intel Xeon Phi architec- ture.While optimizing applications on CPUs, GPUs and first Xeon Phi’s has been largely studied in the last years, the new features in Knights Landing processors require the revision of programming and optimization techniques for these devices. In this work, we selected the Floyd-Warshall algorithm as a representative case study of graph and memory-bound ap- plications. Starting from the default serial version, we show how data, thread and compiler level optimizations help the parallel implementation to reach 338 GFLOPS. en
dcterms.description XVIII Workshop de Procesamiento Distribuido y Paralelo (WPDP) es
dcterms.extent 11 p. es
dcterms.issued 2017
dcterms.language Inglés es
dcterms.license Attribution-NonCommercial-ShareAlike 4.0 International (BY-NC-SA 4.0) es
dcterms.subject Xeon Phi en
dcterms.subject Knights Landing en
dcterms.subject Floyd-Warshall en
cic.version info:eu-repo/semantics/publishedVersion es Rucci, Enzo es De Giusti, Armando Eduardo es Naiouf, Marcelo es
cic.lugarDesarrollo Instituto de Investigación en Informática es
dcterms.subject.materia Ingenierías y Tecnologías es
dcterms.identifier.url Recurso Completo es
dcterms.isPartOf.issue XXIII Congreso Argentino de Ciencias de la Computación (La Plata, 2017) es
dcterms.isPartOf.series Congreso Argentino de Ciencias de la Computación es
cic.isPeerReviewed true es
cic.isFulltext true es
cic.institucionOrigen Instituto de Investigación en Informática es


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