AES development in FPGA

cic.isFulltexttruees
cic.isPeerReviewedtruees
cic.lugarDesarrolloUniversidad Nacional de La Plata es
cic.versioninfo:eu-repo/semantics/publishedVersiones
dc.date.accessioned2016-09-05T14:57:45Z
dc.date.available2016-09-05T14:57:45Z
dc.identifier.urihttps://digital.cic.gba.gob.ar/handle/11746/4157
dc.titleAES development in FPGAen
dc.typeRevisiónes
dcterms.abstractThe National Institute of Standards and Technology (NIST) created a new standard known as Advanced Encryption Standard (AES), with the objective of developing the Federal Information Processing Standard (FIPS) which specifies an encryption algorithm capable of protecting sensitive information to be used by the government of the United States. In October 2000, the NIST selected Rijndael as the algorithm proposed for the AES.\nThe algorithm has a round shape made up by three uniform and non-reversible transformations which assures broadcast over the total set of fixed rounds and optimal non-linearity properties. This thesis presents an 8-bit FPGA implementation of the 128-bit block and 128 bit-key AES cipher.en
dcterms.creator.authorVillagarcía Wanza, Horacio Alfredoes
dcterms.descriptionReseña de la tesis presentada en 2006 por Mónica Cristina Liberatori para obtener el título de Magister en Redes de Datos (UNLP)es
dcterms.extentp. 99-100es
dcterms.identifier.otherISSN 1666-6038es
dcterms.identifier.urlDocumento completoes
dcterms.isPartOf.issuevol. 6, nº 2es
dcterms.isPartOf.seriesJournal of Computer Science and Technologyes
dcterms.issued2006-10
dcterms.languageIngléses
dcterms.licenseAttribution 4.0 International (BY 4.0)es
dcterms.relationDesarrollo de encriptado AES en FPGAes
dcterms.subjectcriptografíaes
dcterms.subjectRijndaeles
dcterms.subjectreseña de tesises
dcterms.subject.materiaCiencias de la Computaciónes

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